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FV1 dev board clock noise and vol drop

Posted: Thu Oct 17, 2019 5:24 pm
by Timspin
I am seeing on scope and hearing significant clock noise from Spin FV1 + dev board (tagboardeffects) , plus severely attenuated volume/signal compared to bypass.

Xtal is a DT-38 with 15pF cap
I can hear that the effect from the eeprom is loaded and present. Any pointers to what may be causing either of these issues,
Thx,
Tim

Re: FV1 dev board clock noise and vol drop

Posted: Fri Oct 18, 2019 10:46 pm
by frank
That is not an FV-1 dev board, that is a board by someone else. You will need to ask them if they have had this issue before.

Re: FV1 dev board clock noise and vol drop

Posted: Sat Oct 19, 2019 3:51 am
by Timspin
Thanks for the reply.
I believe this is a vero layout version of a PedalPCB.com dev board - (which I have ordered) . I have posted an request for information on the original layout shown here not received a reply yet. As a noob I was curious about the general issue of seeing clock feedthrough
in the signal of FV1 layouts and how to eliminate - cap and ground plane inductance etc