MEM label length ;set label for delay memory segment, label# references end, label^ references midpoint
EQU label value ;set constant values, or label registers:
EQU HFP reg0  
EQU KRF 0.11  
[dadd]=data at delay ram address, [addr_ptr]=data at delay ram address specified by ADDR_PTR
[reg]=data at register, ACC=accumulator value, PACC=last accumulator value,
LR=delay ram data from last RDA operation.

 

NOP      
CLR ACC=0    
RDA dadd,K1 ACC=ACC+[dadd]*K1 K1=11b, -2.0 to  +0.998047
WRA dadd,K1 [dadd]=ACC, ACC=ACC*K1 K1=11b, -2.0 to  +0.998047
WRAP dadd,K1 [dadd]=ACC, ACC=ACC*K1+LR K1=11b, -2.0 to  +0.998047
RMPA addr_ptr,K1 ACC=ACC+[addr_ptr]*k1 K1=11b, -2.0 to  +0.998047
RDAX reg,K1 ACC=ACC+[reg]*K1 K1=16b, -2.0 to  +0.9999389
RDFX reg,K1 ACC=ACC+([reg]-ACC)*K1 K1=16b, -2.0 to  +0.9999389
WRAX reg,K1 [reg]=ACC, ACC=ACC*K1 K1=16b, -2.0 to  +0.9999389
WRHX reg,K1 [reg]=ACC, ACC=ACC*K1+PACC K1=16b, -2.0 to  +0.9999389
WRLX reg,K1 [reg]=ACC, ACC=(PACC-ACC)*K1+PACC K1=16b, -2.0 to  +0.9999389
MAXX reg,K1 ACC=max of |ACC| or |[reg]*K1| K1=16b, -2.0 to  +0.9999389
ABSA   ACC=|ACC|  
MULX reg ACC=ACC*[reg]  
LOG K1,K2 ACC=(LOG2(ACC)/16)*K1+K2 K1=16b, -2.0 to  +0.9999389
      K2=11b, -1 to +0.999023
EXP K1,K2 ACC=(2^(ACC*16))*K1+K2 K1=16b, -2.0 to  +0.9999389
      K2=11b, -1 to +0.999023
SOF K1,K2 ACC=ACC*K1+K2 K1=16b, -2.0 to  +0.9999389
      K2=11b, -1 to +0.999023
AND MASK ACC=ACC&MASK MASK = 24b value
OR MASK ACC=ACC | MASK MASK = 24b value
XOR MASK ACC=ACC ^ MASK MASK = 24b value
NOT   invert ACC bits  
LDAX reg ACC=[reg]  
SKP cond,val conditionally skip val number of ops  
conditions: RUN=if not first execution, ZRC=sign of ACC <> sign of PACC, ZRO=ACC=0, GEZ=ACC>=0, NEG=ACC<0

 

CHO RDAL,lfo ACC=(LFO) for accessing an LFO directly
CHO SOF,lfo,param,addrs ACC=ACC*value+ for performing crossfade (pitch transposition)
CHO RDA,lfo,param,addrs ACC=ACC+[dadd]*interp for performing interpolated memory read (var. delay)
lfo reference can be sin0, sin1, rmp0 or rmp1. addrs is base address of delay to be accessed.
param is 6 bit word defining certain variables:
bit0 (SIN=000000, COS=000001) selects SIN(0) or COS(1) usage
bit1 (REG=000010) 'captures' LFO results for use; use only during the first reference to a given LFO
bit2 (COMPC=000100) compliments the coefficient part of the LFO output
bit3 (COMPA=001000) compliments the address portion of the LFO output
bit4 (RPTR2=010000) adds 0.5 of maximum RAMP amplitude to the RAMP output (second pitch pointer)
bit5 (NA=100000) selects crossfade coefficient for use with CHO  SOF operation
param value can be set as a binary value (%000110), hexidecimal ($06), or as an expression of ORed reserved names,
in any order, for example:  SIN|COMPC|COMPA.

 

Spin Semiconductor